NANOobc-2 (2nd Generation)
Fault tolerant on-board computer for a mission critical operation
The NANOobc-2 on-board computer represents the second generation of SkyLabs’s flight proven OBC for the emerging space market. Its fault tolerance by design provides remarkable reliability and robustness against SEE. Fault tolerance is assured by redundancy on the component level and their flight heritage, latch-up protection by constant current monitoring and several mitigation techniques. The NANOobc-2 is powered by PicoSkyFT processor, which furthermore increases operational reliability and delivers nearly 16 MIPS. NANOobc-2 features a redundant mass storage and sufficient capacity of non-volatile and volatile program and data memories to assure functionality for the most demanding space applications. The NANOobc-2 is delivered with flight proven firmware framework, on which customers can build application layer functions to suit mission need.
The NANOobc-2 is designed to function as the primary on-board computer of a nano/micro or small-scale satellites. As such, it implements a PicoSkyFT core with sufficient amounts of program and data memory for even the most intensive operations tasks, while being compatible with the PC-104 form factor. It supports a redundant CAN bus interface as well as two high-speed LVDS interfaces, supporting the 10b8b coding scheme. It features extensive fault tolerant features, including the features built into the FT version of the PicoSky core, as well as integrated Latching Current Limiters and additional SoC protections (Watchdog timer, two CRC protected banks of program memory).
- Radiation hardened by design to increase reliability and robustness
- Constant current monitoring and limiting
- Selective components technology selection with flight heritage
- EDAC protected memories/registers
- Advance FDIR techniques
- SoC powered by fault tolerant PicoSkyFT processor
- LUT-based supervisor for protecting user program from errors.
- LUT-based program memory CRC check assuring valid code is running.
- A two-bank program memory architecture, allowing the running program to perform upgrades to the firmware in the other bank.
- Multi-channel DMA controller
- UART controller
- SPI-MRAM NVMEM controller with EDAC support
- CAN controller
- ONFI compliant NAND controller
- LCL management peripheral with error injection capability.
- Multichannel ADC controller
- LVDS controllers
- Watchdog timer
- On-Boar Time controller with PPS signal distribution and fail over to synthetic PPS in case of lost GNSS
- Redundant mass storage NAND Flash with capacity of 2 GB
- SEE immune non-volatile MRAM memories for code and TM storage
- Instant boot up at power on
- Comprehensive local subsystem telemetry (currents, voltages, temperatures, etc.)
- Dual LVDS interface links for high-speed data transfer (EIA/TIA-644)
- Redundant CAN interface for TM/TC
- 8 GPIOs with interface remapping capability (SPI, I2C, UART, 1PPS)
- PicoSkyFT™ programming and debugging interface
- GNSS receiver with 1 PPS signal output capability
- Delivered with flight proven NANOobc Board Support Package that includes:
- Documentation (Datasheet, User guide)
- PicoSkyFT compiler toolchain for Linux/Windows,
- ported and flight proven FreeRTOS with HAL libraries for all peripherals and
- PicoSkyFT USB debugger/programmer.
- Optionally delivered with NANOsky CMM™ SDK that includes:
- Out of the box supportwith command, monitor and management
- NANOobc FW with bootloader, emergency mode operation, FW image selection and integrity checks, FW update mechanism, parameters system, verified FDIR mechanism, CAN-TS and LVDS-TS communication stacks, housekeeping TM acquisition and logging, memory management, OBT management, redundancy management, permanent storage subsystem, software scrubber and more.
- Part of NANOsky SDK is also C++/Qt application framework for Windows/Linux which fully supports all firmware functionalities which furthermore eases integration with third party AIV/T or EGSE software, or building one from scratch.
- Fully supported by skyEGSE-GUI application
|Processor||PicoSkyFT SoC, running at 16MHz|
|On board memories||Code memory: MRAM 4 MB (1Mb x 32-bit, unlimited read/write endurance, SEE immune)
Data memory: SRAM 2 MB (1 Mb x 16-bit)
TM storage: Serial MRAM 4 Mb (unlimited read/write endurance, SEE immune)
|Mass storage||2 GB NAND Flash|
|On-board Communication interfaces||Redundant CAN bus
Redundant High speed LVDS/RS422
8 GPIOs with multi-function
|On-board GPS receiver||L1 C/A code
|Supply voltage||5 V DC (+/- 10%)|
|Power consumption||<1 W (peek) <0.9 W (idle mode)|
|Dimensions:||95 x 91 x 11 mm, fully compliant with PC104 form factor|
|Operation temperature||-10oC to +60oC|
|Storage temperature||-20°C to +65°C|
|Radiation tolerance||> 30 krad (Si)
|Quality Assurance:||ISO 19683:2017, ECSS-E-ST-10-02C/03C, IPC Class3+|