The fault tolerant PicoSkyFT processor core and its instruction set developed by SkyLabs has been extended by a widely accepted single precision IEEE754 compliant floating-point unit (FPU). The new instruction set provides atomic execution of standard floating point arithmetic operations those including square, square root, inversion, number conversions and comparison.
SkyLabs decided to improve the overall PicoSkyFT core with an FPU to ensure the best compromise in terms of performance and costs to address vector-based loop control and high dynamic algorithms required by applications such as attitude determination and control.
The FPU extension of the fault tolerant PicoSkyFT not only increases the computational performance in major by reducing the floating-point arithmetic operations from several hundred cycles to an average of a few cycles, but also reduces the code size and improves the overall code efficiency. The atomic operation of 15 new hardware accelerated floating-point instructions ensures compliance with deterministic requirements of real time applications and real time operating system (RTOS).
To demonstrate the improvements coming from the use of this hardware implementation two examples were analyzed, which highlight performance comparison between the hardware FPU versus the software one. The hardware FPU makes the FPLOPS benchmarking algorithm 7.69 times faster, and the JULIA SET algorithm implemented by complex math 4.26 times faster, while the code size is reduced for 1.6%. The new floating-point instructions are fully supported by the compiler and no code modification is needed, the FPU is activated in the compiler options.
This makes the fault tolerant PicoSkyFT processor core with hardware FPU suitable for many applications in radiation harsh environments needing floating-point mathematical handling such as loop control or digital filtering. It makes the development faster and safer, from high level design tools to software generation.